Fast growth of the pervasive computing and handheld/communication industry has generated exploding demand for high capacity nonvolatile solid-state data storage devices. Flash memory is one such device but has several drawbacks such as slow access speed, limited endurance, and the integration difficulty in system-on-chip (SoC). Flash memory (NAND or NOR) also faces significant scaling problems.
Magneto-resistive or magnetic Random Access Memory (MRAM) is a candidate for future nonvolatile and universal memory. MRAM features non-volatility, fast writing/reading speed (<10 ns), almost unlimited programming endurance (>1015 cycles) and zero standby power. One basic component of MRAM is a magnetic tunneling junction (MTJ). Data storage is realized by switching the resistance of MTJ between a high-resistance state and a low-resistance state. MRAM switches the MTJ resistance by using a current induced magnetic field to switch the magnetization of MTJ. In operation, the MRAM can be read by measuring the tunneling resistance and inferring the magnetization state of the MTJ.
As the MTJ size shrinks, the switching magnetic field amplitude increases and the switching variation becomes more severe. Hence, the incurred high power consumption limits the scaling of conventional MRAM. Thus, there is a need for MRAM that can operate at lower power.